The words «memory model» are known to induce fear, sleep, or even coma among the best of developers. Truly understanding the intricate relationship between the compiler, the processor, and the memory system is necessary if you plan to design low-level synchronization, write lock-free code, or even debug race conditions that are already present in your code. In this deep session we will climb down into the abyss of the CLR and C++ memory models, affectionately known as SC-DRF. We will talk about volatile and atomic variables, see multiple examples of compiler- and processor-induced reorderings, and see how a lot of code we assume to be correct in fact happens to be totally broken on non-Intel processors.
Sasha Goldshtein 
Sela Group
Sasha Goldshtein is the CTO of Sela Group, a Microsoft C# MVP and Azure MRS, a Pluralsight author, and an international consultant and trainer. Sasha is the author of «Introducing Windows 7 for Developers» (Microsoft Press, 2009) and «Pro .NET Performance» (Apress, 2012), a prolific blogger, and author of numerous training courses including .NET Debugging, .NET Performance, Android Application Development, and Modern C++. His consulting work revolves mainly around distributed architecture, production debugging, and mobile application development.